Multistepped threshold convergence for a flash memory array

摘要

A method of converging threshold voltages of memory cells in a flash EEPROM array after the memory cells have been erased, the method including applying a gate voltage (VG) having an initial negative value which is increased to a more positive value in steps during application of a drain disturb voltage (VD). By applying a gate voltage (VG) with an initial negative value, leakage current during convergence is reduced enabling all cells on bit lines of the array to be converged in parallel. $$