| 摘要 |
A low power dynamic circuit with an inverter-like output is disclosed. The dynamic circuit includes a precharge circuit, a discharge circuit, and an output circuit. The precharge circuit charges a precharge node from the clock signal when the data input signal is low and the clock input is high. The discharge circuit discharges a discharge node to the clock signal when the data input signal is high and the clock input is low. The output circuit is an inverter-like configuration that uses the precharge node to generate a logic high and the discharge node to generate a logic low, as required by the data input signal. In one embodiment, the precharge circuit is operative with a first clock and the discharge circuit is operative with a second clock. In yet another embodiment, there is only a precharge circuit and an output circuit.
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