发明名称 High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines
摘要 A system of the present invention uses small swing differential source synchronous voltage and timing reference (SSVTR and /SSVTR) signals to compare single-ended signals of the same slew rate generated at the same time from the same integrated circuit for high frequency signaling. The SSVTR and /SSVTR signals toggle every time the valid signals are driven by the transmitting integrated circuit. Each signal receiver includes two comparators, one for comparing the signal against SSVTR and the other for comparing the signal against /SSVTR. A present signal binary value determines which comparator is coupled to the receiver output, optionally by using exclusive-OR logic with SSVTR and /SSVTR. The coupled comparator in the receiver detects whether change in signal binary value occurred or not until SSVTR and /SSVTR have changed their binary value. The same comparator is coupled if the signal transitions. The comparator is de-coupled if no transition occurs.
申请公布号 US7009428(B2) 申请公布日期 2006.03.07
申请号 US20040947892 申请日期 2004.09.22
申请人 JAZIO, INC. 发明人 HAQ EJAZ UL
分类号 H04L7/02;H04L25/06;G01R29/02;G06F13/40;H03K19/0185;H03M9/00;H04L7/00;H04L25/02 主分类号 H04L7/02
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