发明名称 Circuit for measuring parameter of time-base error of pulse train, and optical disk recording apparatus
摘要 A PLL circuit ( 24 ) reproduces a clock signal from a reproduction EFM signal of an optical disk ( 10 ). A phase error signal (pco) of the PLL circuit ( 24 ) is converted into an absolute value by an absolute value circuit ( 38 ), and is averaged for each subcode frame period by an accumulator ( 40 ). The recording beam power of a laser beam is determined on the basis of an output of the accumulator ( 40 ). A pulse-length discrimination circuit ( 26 ) discriminates the pulse length of the reproduction EFM signal. A specific-pulse-length phase-error-signal extracting circuit ( 42 ) extracts the phase error signal (pco) of a specific pulse length. The extracted phase error signals (pco) are averaged for the respective subcode frame periods by a accumulator ( 44 ). The time base of the corresponding pulse length of the recording EFM signal is corrected on the basis of the output of the accumulator ( 44 ).
申请公布号 US7009924(B2) 申请公布日期 2006.03.07
申请号 US20010920567 申请日期 2001.08.01
申请人 YAMAHA CORPORATION 发明人 MORISHIMA MORITO
分类号 G01R29/02;G11B5/09;G01R29/26;G11B7/0045;G11B7/125;G11B20/14;G11B27/30;G11B27/36;H03L7/06;H03L7/18 主分类号 G01R29/02
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