发明名称 |
Transceiver with latency alignment circuitry |
摘要 |
In a transceiver system a first interface receives data from a first channel using a first clock signal and transmits data to the first channel using a second clock signal. A second interface receives data from a second channel using a third clock signal and transmits data to the second channel using a fourth clock signal. A re-timer re-times data received from the first channel using the first clock signal and retransmits the data to the second channel using the fourth clock signal.
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申请公布号 |
US7010658(B2) |
申请公布日期 |
2006.03.07 |
申请号 |
US20030699116 |
申请日期 |
2003.10.31 |
申请人 |
RAMBUS INC. |
发明人 |
DONNELLY KEVIN;JOHNSON MARK;TRAN CHANH;DILLON, LEGAL REPRESENTATIVE NANCY D. |
分类号 |
G06F12/00;G06F13/40 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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