发明名称 method of forming interconnection lines in a semiconductor device
摘要 <p>A method of forming an interconnection line in a semiconductor device includes forming an interlayer insulating layer on an underlying layer having a lower conductive layer, patterning the interlayer insulating layer to form an opening exposing the lower conductive layer, forming an additional material layer conformally on the underlying layer including the opening, anisotropically etching the additional material layer to form an opening spacer covering a sidewall of the opening, performing a wet etch process using the opening spacer as an etch mask, forming a conductive layer pattern in the opening, and performing a heat treatment on the opening spacer.</p>
申请公布号 KR100558008(B1) 申请公布日期 2006.03.06
申请号 KR20030099115 申请日期 2003.12.29
申请人 发明人
分类号 H01L21/283;H01L21/4763;H01L21/768;H01L23/522;H01L23/532 主分类号 H01L21/283
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