| 摘要 |
In one embodiment, a multi-input/multi-output system ( 100 ) includes a receiver ( 104 ), processor, coded bit scrambler ( 114 ), coded bit descrambler ( 130 ), and transmitter ( 102 ). The receiver ( 104 ) generates demodulated symbol streams corresponding to a received signal. The processor generates coded bit sequences from source bit streams when operating in a transmit mode and bit log-likelihood ratio sequences from the information bit streams when operating in a receive mode. The coded bit scrambler ( 114 ) scrambles the coded bit sequences to generate scrambled bit streams when in the transmit mode. The coded bit descrambler ( 130 ) descrambles the log-likelihood ratio sequences by a real-valued descrambling sequence when operating in the receive mode, and also removes the effect of a scrambling sequence. The transmitter ( 102 ) generates a transmit signal corresponding to the scrambled bit streams.
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