发明名称 TESTER AND TESTING METHOD
摘要 <p>A tester for testing a device under test comprising an instruction executing section for sequentially executing the instructions included in a test program of the device for each instruction cycle, a test pattern memory storing pattern length identification information for identifying the pattern length of a test pattern sequence outputted during an instruction cycle period of time during which the instructions are executed and the test pattern sequence after associating the information with each instruction, a test pattern memory read section for reading, from the test pattern memory, a test pattern sequence having a length corresponding to the pattern length identification information stored in the test pattern memory and associated with one instruction to be executed, and a test pattern output section for outputting, to a terminal of the device, the test pattern sequence read by the test pattern memory read section according to the one instruction during the instruction cycle period of time during which the one instruction is executed.</p>
申请公布号 WO2006022087(A1) 申请公布日期 2006.03.02
申请号 WO2005JP12833 申请日期 2005.07.12
申请人 ADVANTEST CORPORATION;MURATA, KIYOSHI 发明人 MURATA, KIYOSHI
分类号 G01R31/28 主分类号 G01R31/28
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