| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device where an operation margin of an SRAM cell can widely be secured and software error resistance can be improved, and to provide a manufacturing method of the device. <P>SOLUTION: An element separation insulating film 2 is formed on a p-type Si substrate 1, and an n-type buried layer 20 is formed in an N-LV region of an SRAM cell region. A p-well and an n-well are formed. At the time of forming a channel doped layer, ions are implanted in the N-LV region of the SRAM cell region in parallel to the ion implantation of N-LV in a logic circuit region. The ions are also implanted in the N-LV region of the SRAM cell region in parallel to the ion implantation to the N-MV of an an I/O region. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
