| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device having the cell in which the operations of a memory cell are stabilized compared with a conventional design and the occurrence of errors during reading of the cell is reduced. SOLUTION: The memory cell having an SRAM structure is provided with a third transistor in which one of the source or the drain is connected to a second bit line and the gate is connected to a word line and a fourth transistor in which one of the source or the drain is connected to the other source and the drain of the third transistor, the source and the other drain is connected to the ground and the gate is connected to a first data node. COPYRIGHT: (C)2006,JPO&NCIPI
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