| 摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit capable of testing efficiently a memory block, in an actually operated clock frequency, in a short time. SOLUTION: This integrated circuit 1 has the memory block 10 having a RAM macro 2, the first and second scanning circuits 7, 8 having a plurality of scanning flip-flops (FF), and a serial access memory BIST circuit 3. The scanning circuit 7 has an input-side scanning FF group 9A, capable of inputting and outputting a data to/from the memory block 10, and the scanning circuit 8 has an output-side scanning FF group 9B, capable of receiving the data from the memory block 10. A normal scan test is carried out in the first test mode, and a BIST signal is output serially, from the serial access memory BIST circuit 3 in the second test mode. A selector 4 selects the BIST signal to be output to the input-side scanning FF group 9A and conducts test for the memory block 10. COPYRIGHT: (C)2006,JPO&NCIPI
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