发明名称 Method of forming wiring pattern and method of forming gate electrode for TFT
摘要 The invention provides a method of forming a wiring pattern in which a conductive material layer is formed in a pattern formation region having a first region, which is bordered by a bank pattern and has a first width, and a second region, which touches the first region and has a second width smaller than the first width, on a substrate, by discharging a droplet of a conductive material in a liquid phase using a droplet discharge device. The method includes forming the conductive material layer to cover the first region and the second region, by discharging the droplet having a diameter smaller than the first width and greater than the second width toward the first region. In this case, the droplet is discharged such that the droplet lands at a position that faces a boundary line between the first region and the second region.
申请公布号 US2006045963(A1) 申请公布日期 2006.03.02
申请号 US20050206802 申请日期 2005.08.19
申请人 SEIKO EPSON CORPORATION 发明人 HIRAI TOSHIMITSU;SAKAI SHINRI
分类号 C23C26/00;C23C30/00 主分类号 C23C26/00
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