发明名称 Sampling circuit
摘要 <p>In a sampling circuit for an analog voltage signal, it is intended to solve a problem that if a capacitor that is used for sampling a voltage is charged intermittently in plural sampling periods, the charging of the capacitor does not reach an equilibrium state due to leak current discharges occurring between the sampling periods. In a sampling period, a charging/discharging circuit (10) charges or discharges the capacitor by a current corresponding to the difference between an input voltage (V in ) and an output voltage (V out ). A voltage storing circuit (18) holds a reference voltage value obtained by A/D-converting an output voltage (V out ) at the end of the sampling period. Before a start of the next sampling period, a recharging circuit (12) charges or discharges the capacitor (14) by a current corresponding to the difference between the output voltage (V out ) and a voltage obtained by D/A-converting the reference voltage value supplied from the voltage storing circuit (18). In this manner, the recharging circuit compensates for the amount of discharge of the capacitor that has occurred between the sampling periods and thereby restores the amount of charge that was stored in the capacitor at the end of the preceding sampling period. As a result, the output voltage (V out ) is caused to converge to the target sampling voltage quickly.</p>
申请公布号 EP1630821(A2) 申请公布日期 2006.03.01
申请号 EP20050018203 申请日期 2005.08.22
申请人 SANYO ELECTRIC CO., LTD. 发明人 NIKI, MUTSUKI;UEKI, KEIJIRO
分类号 G11C27/02 主分类号 G11C27/02
代理机构 代理人
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