发明名称 |
REDUCING LOADLINE IMPEDANCE IN A SYSTEM |
摘要 |
In one embodiment, the present invention includes a method of mounting a semiconductor device (30) to a first side of a circuit board (20); and mounting at least one voltage regulator device to a second side of the circuit board, the second side opposite to the first side. The voltage regulator devices may be output filters, inductors (46), capacitors (41), and the like. In certain embodiments, the devices may be located directly underneath the semiconductor device. |
申请公布号 |
WO2006019621(A1) |
申请公布日期 |
2006.02.23 |
申请号 |
WO2005US24302 |
申请日期 |
2005.07.08 |
申请人 |
INTEL CORPORATION;SEARLS, DAMION;OSBURN, EDWARD |
发明人 |
SEARLS, DAMION;OSBURN, EDWARD |
分类号 |
(IPC1-7):H05K1/02;H05K1/18 |
主分类号 |
(IPC1-7):H05K1/02 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|