发明名称 THIN TUNGSTEN SILICIDE LAYER DEPOSITION AND GATE METAL INTEGRATION
摘要 A method for depositing layers of a gate electrode is provided. The method includes depositing a doped polysilicon layer, a thin tungsten silicide layer, and a metal layer. In one aspect, the doped polysilicon layer and the thin tungsten silicide layer are deposited within an integrated processing system. In a further aspect, depositing the thin tungsten silicide layer includes exposing a polysilicon layer to a silicon source, depositing a tungsten silicide layer, and exposing the tungsten silicide layer to a silicon source.
申请公布号 WO2006019603(A2) 申请公布日期 2006.02.23
申请号 WO2005US24163 申请日期 2005.07.07
申请人 APPLIED MATERIALS, INC.;LI, MING;WANG, SHULIN 发明人 LI, MING;WANG, SHULIN
分类号 H01L21/28;H01L21/3205 主分类号 H01L21/28
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