| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce power consumption and to suppress the occurrence of skew between output terminals. <P>SOLUTION: A distributing integrated circuit 34 is provided with a pair of clock input terminals for inputting a differential clock signal and a plurality of pairs of clock output terminals for outputting the differential clock signal. Microstrip lines 42, 44 are formed correspondingly to a pair of clock input terminals so that their terminal end resistors Rt4 to Rt7 are connected to nearby parts of these clock input terminals. A plurality of branch microstrip lines 50, 52 are connected to each of the microstrip lines 42, 44 through a resistor element Rb. The other ends of respective branch strip lines 50, 52 are connected to the clock output terminals through lands 54, 56. The resistor element Rb connected to one microstrip line is formed across the other microstrip line. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
