发明名称 Gate line driving circuit
摘要 A gate line driving circuit includes a shift register section that selects gate lines for gradation display and for black insertion, and an output circuit that outputs a driving signal to the gate line which is selected by the shift register section. In particular, the output circuit is configured to obtain an overlap between an output period of a driving signal to each selected gate line and an output period of a driving signal to a gate line that is driven in precedence to the selected gate line, and independently control a first preliminary driving period corresponding to the overlap for gradation display and a second preliminary driving period corresponding to the overlap for black insertion.
申请公布号 US2006038767(A1) 申请公布日期 2006.02.23
申请号 US20050206768 申请日期 2005.08.19
申请人 NAKAMURA TETSUYA;KAWAGUCHI SEIJI;TAKEOKA MASAHIKO 发明人 NAKAMURA TETSUYA;KAWAGUCHI SEIJI;TAKEOKA MASAHIKO
分类号 G09G3/36 主分类号 G09G3/36
代理机构 代理人
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