| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device wherein integration degree can easily be improved. SOLUTION: A pair of source/drain regions 11, 11 of an nMOS transistor 10 are formed in an active region 4a. A gate electrode layer 13 is formed on the region of a semiconductor substrate between the pair of source/drain regions 11, 11 via a gate oxide film. The gate electrode layer 13 is provided as extending over both of the active region 4a and an element isolating construction, and has a contact pad 13a on the element isolating construction. The spacing S1 between the active region 4a and the contact pad 13a in the plan view is less than 0.5μm. COPYRIGHT: (C)2006,JPO&NCIPI
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