Using clock and data recovery phase adjust to set loop delay of a decision feedback equalizer

摘要

In a method and apparatus for communicating, data, a decision feedback equalizer equalizes received data to reduce channel related distortion in the received data. An extracted clock signal is generated from the equalized data. The phase of the extracted clock signal may be adjusted to compensate for processing delay during equalization of the received data. The extracted clock signal may be used to clock a retimer of the decision feedback equalizer to generate recovered data.