发明名称 Jabber counter mechanism for elastic buffer operation
摘要 An Elastic Buffer is provided to process data in a computer network and a write controller is provided to control memory storage operation of such an Elastic Buffer. The write controller may comprise a comparator mechanism which detects if link data from a source contains an IDLE signal; a Jabber counter mechanism which counts each cycle of a link clock in which an IDLE signal is not detected, and resets the count each time the IDLE signal is detected, and which asserts a DISABLE signal for a single link clock cycle if a count value reaches a programmed time-out value; and a logic gate which logically combines outputs from the comparator mechanism and the Jabber counter mechanism to generate a Write control signal for prohibiting a corresponding link data sequence from being stored in memory storage of the Elastic Buffer so as to prevent data overflow in the memory storage.
申请公布号 US7003059(B1) 申请公布日期 2006.02.21
申请号 US20000500524 申请日期 2000.02.09
申请人 INTEL CORPORATION 发明人 SUSNOW DEAN S.;REOHR, JR. RICHARD D.
分类号 G06F13/36;G06F1/12;H04L1/00;H04L7/02;H04L25/05 主分类号 G06F13/36
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