| 发明名称 |
Method of manufacturing semi conductor device |
| 摘要 |
A fabrication method of a semiconductor device which has on the same semiconductor layer a transistor with a different high voltage gate as well as a high voltage drain and an MNOS memory transistor.
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| 申请公布号 |
US7001812(B2) |
申请公布日期 |
2006.02.21 |
| 申请号 |
US20040961768 |
申请日期 |
2004.10.07 |
| 申请人 |
SEIKO EPSON CORPORATION |
发明人 |
NODA TAKAFUMI;INOUE SUSUMU;TSUYUKI MASAHIKO;EBINA AKIHIKO |
| 分类号 |
H01L21/283;H01L21/8234;H01L21/76;H01L21/8238;H01L21/8247;H01L27/088;H01L27/092;H01L27/10;H01L27/105;H01L27/115;H01L29/423;H01L29/49;H01L29/788;H01L29/792 |
主分类号 |
H01L21/283 |
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