发明名称 Process and apparatus for finite field multiplication (FFM)
摘要 Finite field multiplication of first and second Galois elements having n bit places and belonging to a Galois field GF 2<SUP>n </SUP>described by an irreducible polynomial is performed by forming an intermediate result Z of intermediate sums of partial products of bit width 2n-2 in an addition part of a Galois multiplier. The intermediate result Z is processed in a reduction part of a Galois multiplier by modulo dividing by the irreducible polynomial, whereby after all XOR's are traversed a result E with n bits is computed.
申请公布号 US7003538(B2) 申请公布日期 2006.02.21
申请号 US20020071708 申请日期 2002.02.08
申请人 SYSTEMONIC AG 发明人 DRESCHER WOLFRAM
分类号 G06F15/00;G06F7/00;G06F7/72 主分类号 G06F15/00
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