发明名称 Method to reduce soft error rate in semiconductor memory
摘要 A method for reducing soft error rates in semiconductor memory. In one embodiment, memory is partitioned into a) boot and download memory, b) program memory and c) data memory. Each partition receives protection according to the importance of the data stored. The boot memory is protected by sensing errors and repairing them utilizing on-chip data storage redundancy and exchange. The program memory is protected by sensing errors and repairing damaged data by reloading it using the program stored in the boot and download memory. The data memory is selectively protected similar to the program memory, but with the added feature of regular saving to disk from which to check for accurate data in the event of corruption. In another embodiment, any or all of the soft error protection features are selectable on a global basis, a memory type basis or, in the cases of program and data memory, on a block level basis.
申请公布号 US2006036913(A1) 申请公布日期 2006.02.16
申请号 US20040919212 申请日期 2004.08.16
申请人 KRASNANSKY KEITH 发明人 KRASNANSKY KEITH
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
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