| 摘要 |
in methods of fabricating a non-volatile memory device having a local silicon-oxide-nitride-oxide-silicon (SONOS) gate structure, a semiconductor substrate having a cell transistor area, a high voltage transistor area, and a low voltage transistor area, is prepared. At least one memory storage pattern defining a cell gate insulating area on the semiconductor substrate within the cell transistor area is formed. An oxidation barrier layer is formed on the semiconductor substrate within the cell gate insulating area. A lower gate insulating layer is formed on the semiconductor substrate within the high voltage transistor area. A conformal upper insulating layer is formed on the memory storage pattern, the oxidation barrier layer, and the lower gate insulating layer. A low voltage gate insulating layer having a thickness which is less than a combined thickness of the upper insulating layer and the lower gate insulating layer is formed on the semiconductor substrate within the low voltage transistor area.
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