| 摘要 |
PROBLEM TO BE SOLVED: To improve the yield of a processor including a cache memory having redundant configuration. SOLUTION: A fuse 56a is made to store the presence/absence of the operation failure of a plurality of RAM 53b configuring a second cache data part 53 installed in a processor like hardware, and when access is performed from a second cache control part 51, an inoperable RAM 53b is replaced with another healthy RAM 53b based on the storage contents of the fuse 56a, so that a processor 10 including the second cache data part 53 whose partial RAM 53b is turned to be inoperable is recovered as half-nondefective product. The information of the fuse 56a is stored in a writable RAM validity/invalidity register 58, and the replacement operation of the RAM 53b by a BANK switching control part 56 may be made variable when any failure is generated in the following process. COPYRIGHT: (C)2006,JPO&NCIPI
|
