| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor device maintaining normal operations and simultaneously achieving the reduction of power consumption. <P>SOLUTION: A main circuit 2 comprises a first critical path logic circuit 21 and a relatively fast second logic circuit 22. A first power supply voltage VDD1 is supplied to the second logic circuit 22. Usually, a second power supply voltage VDD2 is supplied to the first logic circuit 21, and normal operations of the main circuit 2 are maintained. However, when a clock supply circuit 6 is suspending clock supply or when the signal potential of an input signal Din from a signal supply source 3 is fixed, the power-supply voltage of the first logic circuit 21 is lowered to the power-supply voltage VDD1. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
