发明名称 |
IMAGE DATA PROCESSING CIRCUIT AND IMAGE PROCESSING APPARATUS CONFIGURED TO INCLUDE THE SAME |
摘要 |
PROBLEM TO BE SOLVED: To provide an image data processing circuit including: an image data input/output circuit; a compression/expansion circuit; and a memory that realizes a configuration suitable for both a medium speed machine and a high speed machine. SOLUTION: The image data processing circuit includes: an input section for inputting image data; first and second compression sections; first and second expansion sections; an output section for outputting expanded image data; and a transfer control section that selects any of: a parallel input/output mode wherein input transfer for transferring received image data to the first compression section via the memory and output transfer for outputting the data from the first expansion section to the output section via the memory are processed in parallel; a parallel input mode wherein the received image data are transferred from the entry section via the memory to the first and second compression sections in which the data are subjected to parallel compression processing; and a parallel output mode wherein the data expanded in parallel by the first and second expansion sections are transferred to the output section via the memory. COPYRIGHT: (C)2006,JPO&NCIPI |
申请公布号 |
JP2006049991(A) |
申请公布日期 |
2006.02.16 |
申请号 |
JP20040224420 |
申请日期 |
2004.07.30 |
申请人 |
SHARP CORP |
发明人 |
KATSU AKIHIRO;MORIMOTO SATOSHI |
分类号 |
H04N1/00;G06T9/00;H04N1/41 |
主分类号 |
H04N1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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