发明名称 |
IRREGULARITIES SIMULATION SYSTEM |
摘要 |
<p>There is provided an irregularities simulation system enabling easy circuit design suppressing performance deterioration attributed to irregularities. An irregularities analysis unit (100) extracts in advance statistical characteristic of irregularities from a plenty of device samples. A model analysis unit (200) checks response to the parameter fluctuation of the circuit simulation. A fitting execution unit (300) combines these information and decides the parameter irregularities distribution so that circuit simulation reproduce the statistical characteristic of the device samples.</p> |
申请公布号 |
WO2006016611(A1) |
申请公布日期 |
2006.02.16 |
申请号 |
WO2005JP14668 |
申请日期 |
2005.08.10 |
申请人 |
TAKEUCHI, KIYOSHI;NEC CORPORATION |
发明人 |
TAKEUCHI, KIYOSHI |
分类号 |
G06F19/00;G06F17/50 |
主分类号 |
G06F19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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