| 摘要 |
PROBLEM TO BE SOLVED: To provide a bus switch capable of establishing a signal path between a bus master and a bus slave in suitable order of priority when the bus master accesses the bus slave in response to interruption signals. SOLUTION: The bus switch circuit has a plurality of master-side interface circuits A1 and A2 for inputting and outputting respective signals to a plurality of bus masters M1 and M2, and one or a plurality of slave-side interface circuits B1 to B3 for inputting and outputting signals to one or a plurality of bus slaves S1 to S3. The master-side interface circuits and slave-side interface circuits enter interruption signals 110 entered into at least one bus master, and establishes the signal paths between the plurality of bus masters and one or the plurality of bus slaves in response to the interruption signals. COPYRIGHT: (C)2006,JPO&NCIPI |
