| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory cell in which the destruction of memory data by electrical influence from bit lines can be made hard to occur, and and a semiconductor memory apparatus using this. SOLUTION: Even in any case at the time of read-out and at the time of write-in, since nodes N1, N2 and bit lines BL, XBL are not connected electrically and directly by transistor switches as a conventional 6 transistor type SRAM cell and they are separated electrically by high impedance between a gate and a drain of MOS transistors Q1, Q3, Q5 and Q7, or between a gate and a source, the destruction of memory data by an electrical influence from these bit lines can be made hard to occur. COPYRIGHT: (C)2006,JPO&NCIPI
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