发明名称 Semiconductor latches and SRAM devices
摘要 A new Static Random Access Memory (SRAM) cell using a restoring device and a strong inverter is disclosed. An SRAM cell comprises a strong inverter and a strong access transistor constructed on a high-mobility semiconductor substrate layer. An N to 1 programmable multiplexer positioned above the inverter provides the input to said strong inverter from N available discrete voltage levels. A high mobility conducting path is used to read data quickly, while very small programmable elements vertically integrated in one or more planes increase the storage density at no extra area penalty. N data values are stored in one latch location, reducing memory area and cost significantly without sacrificing on time to access the stored data.
申请公布号 US6998722(B2) 申请公布日期 2006.02.14
申请号 US20040851752 申请日期 2004.05.24
申请人 VICICIV TECHNOLOGY 发明人 MADURAWE RAMINDA UDAYA
分类号 H01L27/11;G11C7/00;G11C11/412;H01L21/76;H01L21/8244;H01L21/84;H01L27/12;H03F3/45 主分类号 H01L27/11
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