发明名称 Scalable integrated circuit architecture with analog circuits
摘要 An integrated circuit architecture includes a phase lock loop (PLL) circuit that includes a feedback circuit that receives a reference signal. A voltage controlled oscillator (VCO) has an output that communicates with an input of the feedback circuit. A master transistor has a control terminal, a first terminal, and a second terminal that communicates with the VCO. The feedback circuit compares the output of the VCO to the reference signal and generates a drive signal that is output to the control terminal of the master transistor. The integrated circuit architecture further includes N analog circuits and N slave transistors that have control terminals that communicate with the control terminal of the master transistor, first terminals, and second terminals that communicate with respective ones of the N analog circuits.
申请公布号 US6998888(B1) 申请公布日期 2006.02.14
申请号 US20040795039 申请日期 2004.03.05
申请人 MARVELL INTERNATIONAL LTD. 发明人 SONG YONGHUA
分类号 H03L7/06 主分类号 H03L7/06
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