SEMICONDUCTOR MEMORY AND ITS MANUFACTURING METHOD

摘要

PROBLEM TO BE SOLVED: To make it possible to reduce a gate resistance value further with respect to the miniaturization of gate electrode dimension and the like in a semiconductor memory device, especially in the semiconductor memory device wherein a logic region and a memory region with diffusion wiring layer structure are mixedly mounted. SOLUTION: The semiconductor memory is formed on a semiconductor substrate 101 wherein two or more memory cells containing respectively memory transistors comprise a first active region 103 used as a memory region arranged in the shape of a matrix formed by two or more impurity diffused layers (bit line) 107 which cross mutually and two or more gate electrodes (word line) 105. The gate electrode 105 of each memory transistor possesses a projecting part whose center of the upper surface projects from the edge to the upper side. A silicide layer 109 is formed respectively on the upper surface of the projecting part in the gate electrode 105 of each memory transistor. COPYRIGHT: (C)2006,JPO&NCIPI