发明名称 BUS ARBITRATION CIRCUIT, INFORMATION PROCESSING DEVICE, AND PROGRAM AND RECORDING MEDIUM FOR THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a bus arbitration circuit that can arbitrate a bus such that a synchronous device capable of repeatedly transmitting data strings forming synchronous data requiring band guarantee can transmit the synchronous data more reliably. SOLUTION: When detecting the transmission of synchronous data by an external bus I/F 20, the bus arbitration circuit 16 decides an arbitration start time point earlier than a predicted data transmission start time point of the next data string of the synchronous data, according to prediction information stored in a register 33, and starts arbitrating the bus to give a use right to the external bus I/F 20 at the arbitration start time point even if the external bus I/F 20 does not request a use right. The bus use right can be thus given to the external bus I/F 20 without delay earlier than by arbitration started at a bus use right request of the external bus I/F 20. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006040167(A) 申请公布日期 2006.02.09
申请号 JP20040222349 申请日期 2004.07.29
申请人 SHARP CORP 发明人 MATSUYAMA SATORU
分类号 G06F13/362;G06F13/38;G06F13/42 主分类号 G06F13/362
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