发明名称 VECTOR PROCESSOR, INFORMATION PROCESSOR, AND VECTOR PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To reduce noise due to simultaneous operations in the case of a wide range. SOLUTION: An operation control information generating part 12 of an instruction control part 10 generates operation control information based on control information from an instruction execution control part 13 and noise reduction designation information from an operation designating part 11, and outputs it to vector pipeline arithmetic parts 160 to 167 variably in time. The vector pipeline arithmetic parts 160 to 167 input operation control information, and read two vector element data from vector registers VR0 to vector register VRn, and execute an arithmetic operation by an arithmetic execution ALU, and store arithmetic results in vector registers VR0 to VRn. The start of the processing of the vector pipeline arithmetic parts 160 to 167 is made various in time. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006039840(A) 申请公布日期 2006.02.09
申请号 JP20040217283 申请日期 2004.07.26
申请人 NEC COMPUTERTECHNO LTD 发明人 TODA HIDEMASA
分类号 G06F17/16;G06F9/38 主分类号 G06F17/16
代理机构 代理人
主权项
地址