| 摘要 |
A method for fabricating a MIM capacitor with fewer process steps and decreased production cost. The method includes forming a via and a capacitor opening by selectively etching an insulating interlayer, wherein the via exposes the lower metal line and the capacitor opening is wider than the via, forming a first metal layer on the insulating interlayer at a thickness suitable for completely filling the inside of the via, burying the capacitor opening by forming a dielectric layer on the first metal layer inside the capacitor opening, and simultaneously forming an upper metal line and a second metal layer on the via and the dielectric layer by forming and patterning a metal layer.
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