METHOD AND APPARATUS FOR ENTERING A LOW POWER MODE,申请号WO2005US04053-传众专利搜索

发明名称	METHOD AND APPARATUS FOR ENTERING A LOW POWER MODE
摘要	A method and apparatus for entering a low power mode is provided. In one embodiment, data processing system (10) has power control circuitry (52) which may be used to control power usage in data processing system (10). Power mode select circuitry (84) may be used to select a power mode. Depending upon the power mode selected, power control circuitry (52) may use a cascaded approach to selecting which portions of data processing system (10) will be powered down, and thus how deeply data processing system (10) will be powered down.
申请公布号	WO2005104384(A3)	申请公布日期	2006.02.09
申请号	WO2005US04053	申请日期	2005.02.10
申请人	FREESCALE SEMICONDUCTOR, INC.;VU, MIEU VAN;CHUN, CHRISTOPHER K.;GOLDBERG, ARTHUR M.;HAYES, DAVID J.;KHAWAND, CHARBEL;TAO, JIANPING;VAGLICA, JOHN J.	发明人	VU, MIEU VAN;CHUN, CHRISTOPHER K.;GOLDBERG, ARTHUR M.;HAYES, DAVID J.;KHAWAND, CHARBEL;TAO, JIANPING;VAGLICA, JOHN J.
分类号	H04B1/16;H04B1/38;(IPC1-7):H04M1/00	主分类号	H04B1/16
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