| 摘要 |
Over a memory cell array region of a static RAM (random access memory), dummy wire patterns are formed such that each dummy wire pattern covers 2x2 horizontally and vertically-adjacent intersection points of word lines and bit lines, and horizontally-running wire channels and vertically-running wire channels are formed between the dummy wire patterns in a lattice configuration. Then, a signal line is automatically arranged to extend through any of the wire channels. The dummy wire patterns are provided in a layer lying on the word lines, and the signal line is provided as a metal line extending in the same layer as that of the dummy wire patterns.
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