发明名称 Methods for creating electrophoretically insulated vias in semiconductive substrates and resulting structures
摘要 Methods for creating lined vias in semiconductor substrates. Using electrophoretic deposition techniques, micelles of a lining material are deposited on the wall of the via, reacting with the surface of the wall until the entire wall is covered by the lining material. The lining material is then fixed in place to form a layer lining the via. The lined via may then be filled with a desired material. For example, a via lined with an insulative material may be filled with a material such as copper to create an insulated conductive via through the substrate.
申请公布号 US2006027911(A1) 申请公布日期 2006.02.09
申请号 US20050247495 申请日期 2005.10.10
申请人 发明人 FARNWORTH WARREN M.;COLLINS DALE W.;MCDONALD STEVEN M.
分类号 H01L23/04;H01L21/316;H01L21/44;H01L21/768;H01L23/48 主分类号 H01L23/04
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