A METHOD OF AND APPARATUS FOR IMPLEMENTING FAST ORTHOGONAL TRANSFORMS OF VARIABLE SIZE

摘要

A reconfigurable architecture for and method of performing a fast orthogonal transform of vectors in multiple stages, the size of a vector being N, wherein N can vary and the number of stages is a function of N, the architecture including: a computational unit (182) configured and arranged so as to include one or more butterfly units; a block including one or more multipliers (184) coupled to the output of the computational unit, configured and arranged so as to perform all of the butterfly computations for at least one stage of the transform; a storage unit (180) configured and arranged so as to store the intermediate results of the butterfly computations and predetermined coefficients for use by the computational unit for performing each butterfly computation, the storage unit including memory and multiplexing architecture (180).