发明名称 |
Nonvolatile semiconductor memory device |
摘要 |
The present invention provides a nonvolatile semiconductor memory device capable of achieving the speeding-up of reading and a reduction in layout area. A control gate electrode of each of memory cell transistors employed in the nonvolatile semiconductor memory device according to the present invention is configured so as to be capable of assuming a first power supply potential (VCC) and a second power supply potential (VPP) higher than the first power supply potential upon its operation. A second NMOS transistor is provided between the gate of a first NMOS transistor that drives a control gate electrode (WL) to the first power supply potential (VCC) and a control signal (/ER) connected to the gate thereof. The source of the second NMOS transistor is inputted with the control signal (/ER) and the drain thereof is connected to the gate of the first NMOS transistor. A PMOS transistor is provided in parallel with the first NMOS transistor. A transfer gate comprising these NMOS and PMOS transistors drives the control gate electrode (WL).
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申请公布号 |
US2006028884(A1) |
申请公布日期 |
2006.02.09 |
申请号 |
US20050144767 |
申请日期 |
2005.06.06 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
MATSUI KATSUAKI |
分类号 |
G11C29/00;G11C8/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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