发明名称 METHOD AND SYSTEM FOR PREPARING TIMING CONSTRAINT LIBRARY
摘要 PROBLEM TO BE SOLVED: To provide a method and system for preparing a timing constraint library for shortening the preparation time. SOLUTION: An arithmetic processing unit 120 reads circuit data DC from a storage device 110 according to the instructions of software 150 and 160, and selects one of a plurality of timing arcs as a representative timing arc by referring to the circuit data DC. As regards the representative timing arc, the arithmetic processing unit 120 searches timing constraint by executing simulation to all conditions in a predetermined basic condition group. As regards the timing arc sharing either an input terminal In or an output terminal Out with the representative arc, the arithmetic processing unit 120 searches the timing constraint by executing simulation to partial conditions extracted from the basic condition group. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006039621(A) 申请公布日期 2006.02.09
申请号 JP20040214134 申请日期 2004.07.22
申请人 NEC ELECTRONICS CORP 发明人 TOYODA TORU;SHIMIZU TAMAMI
分类号 G06F17/50 主分类号 G06F17/50
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