Method of transforming serial scrambler to parallel scrambler, parallel scrambler and double-edge-triggered register with XOR operation

摘要

A method of transforming a serial scrambler to a parallel scrambler, a parallel scrambler and a double-edge-triggered register with XOR operation are provided. The method transforms a serial scrambler to a parallel scrambler according to a characteristic polynomial: $P\left(x\right)=\sum _{q=0}^N{c}_q{x}^q\mathrm{or}b\left(i\right)=\sum _{q=1}^N{c}_{q}b\left(i-q\right).$ The method first determines a transformation formula: $b\left(\mathrm{kN}+i\right)=\sum _{q=1}^N{c}_{q}b\left(\left(k-R\right)N+i+R\left(N-q\right)\right)$ according to the parameters of the characteristic polynomial. The parallel bits B_j=[b_Mj, b_Mj+1, . . . , b_Mj+M-2, b_Mj+M-1] are arranged in order. The transformation number R=2^t (the initial number of t is 0) is set. The parallel bits are replaced by the transformation formula. When (k-R)N+i+R(N-q) is larger than Mj-1 in the transformation formula, 1 is added to t in the transformation formula R=2^t and the transformation formula is re-counted. Finally, the XOR gates are connected to the registers according to a computed result from the transformation formula.