发明名称 METHOD FOR FABRICATING SHALLOW TRENCH ISOLATION AND SEMICONDUCTOR STRUCTURE USING THE SAME
摘要 A method for fabricating a shallow trench isolation includes forming a trench in a substrate, forming a bottom shallow trench isolation dielectric filling a gap of the trench, and forming a top shallow trench isolation dielectric on the bottom shallow trench isolation. The bottom shallow trench isolation dielectric has a concave center portion, and the top shallow trench isolation dielectric is deposited on the bottom shallow trench isolation by a high density plasma chemical vapor deposition process using low deposition to sputter ratio. A semiconductor structure having the shallow trench isolation is also disclosed.
申请公布号 US2016254179(A1) 申请公布日期 2016.09.01
申请号 US201514632690 申请日期 2015.02.26
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 YEN Chun-Hsu;HUANG Bang-Yu;PENG Chui-Ya;CHEN Ching-Wen
分类号 H01L21/762;H01L29/06;H01L21/311;H01L21/02;H01L21/3105 主分类号 H01L21/762
代理机构 代理人
主权项 1. A method for fabricating a shallow trench isolation, comprising: forming a trench in a substrate; forming a bottom shallow trench isolation dielectric in the trench by a high density plasma chemical vapor deposition (HDP-CVD) process; and forming a top shallow trench isolation dielectric on the bottom shallow trench isolation dielectric by another HDP-CVD process with a different deposition to sputter ratio from that of the bottom shallow trench isolation dielectric.
地址 Hsinchu TW
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