发明名称 Network-on-chip architecture for multi-processor SoC designs
摘要 A system and method embodying some aspects for communicating between nodes in a network-on-chip are provided. The system comprises a microprocessing chip and a plurality of connection paths. The microprocessing chip comprises sixteen processing nodes disposed on the chip. The plurality of connection paths are configured such that each is at most three hops away from any other node. Each node also has connection paths to at most three other nodes.
申请公布号 US9436637(B2) 申请公布日期 2016.09.06
申请号 US201313897049 申请日期 2013.05.17
申请人 Advanced Micro Devices, Inc. 发明人 Kommanaboyina Sudarshanam
分类号 G06F13/40;G06F15/173 主分类号 G06F13/40
代理机构 Volpe and Koenig, P.C. 代理人 Volpe and Koenig, P.C.
主权项 1. A system comprising: a microprocessing chip comprising sixteen processing nodes disposed on the chip, a second microprocessing chip comprising sixteen second processing nodes disposed on the chip, a third microprocessing chip comprising sixteen third processing nodes disposed on the chip, and a fourth microprocessing chip comprising sixteen fourth processing nodes disposed on the chip; and a plurality of connection paths connecting the nodes, wherein the connection paths are configured such that each node is at most three hops away from any other node, and wherein each node has a connection path to at most three other nodes; wherein the sixteen processing nodes form a first 16 node network, the sixteen second processing nodes form a second 16 node network, the sixteen third processing nodes form a third 16 node network, and the sixteen fourth processing nodes form a fourth 16 node network; a second plurality of second connection paths connecting the second processing nodes, wherein the second connection paths are configured such that each second processing node is at most three hops away from any of the remaining second processing nodes, and wherein each second processing node has a connection path to at most three other second processing nodes; a third plurality of third connection paths connecting the third processing nodes, wherein the third connection paths are configured such that each third processing node is at most three hops away from any of the remaining third processing nodes, and wherein each third processing node has a connection path to at most three other third processing nodes; a fourth plurality of fourth connection paths connecting the fourth processing nodes, wherein the fourth connection paths are configured such that each fourth processing node is at most three hops away from any of the remaining fourth processing nodes, and wherein each fourth processing node has a connection path to at most three other fourth processing nodes; and a network connection path connecting the four 16 node networks, wherein the network connection path connects each node from each 16 node network to a corresponding node in each of the other three 16 node networks such that each node in the system is at most four hops from any other node in the system.
地址 Sunnyvale CA US