Virtual phase charge coupled device image sensor

摘要

A charge coupled device (200) includes a clocked barrier pixel architecture that has a two phase gate structure and serves to substantially reduce clock-induced dark current. A first clocked gate (208) coupled to a first clocking signal input (209) forms a clocked barrier region that does not store charge. A second clocked gate (205) adjacent the first clocked gate (208) and coupled to a second clocking signal input (206) forms a clocked well region. The first clocking signal has a different potential level than the second clocking signal, and the first clocking signal is clocked in phase with the second clocking signal.