发明名称 Multiple-grant controller with parallel arbitration mechanism and related method
摘要 A controller embeds a volatile memory, a plurality of application circuits and an arbiter. Each of the application circuits is capable of sending a request signal to request access the volatile memory and has a unique priority. When some of the application circuits send requests in a same period, the arbiter selects application circuits with higher priority among those application circuits such that the selected application circuits are allowed to access the volatile memory. The arbiter includes a plurality of arbiter modules and a main arbiter module. Each of the arbiter modules is assigned to a unique set of application circuits in the controller such that the arbiter modules can select higher priority application circuits in the corresponding sets at the same time. The main arbiter module further selects application circuits for accessing the volatile memory according to application circuits selected by the arbiter modules.
申请公布号 US6996684(B2) 申请公布日期 2006.02.07
申请号 US20030249488 申请日期 2003.04.14
申请人 VIA TECHNOLOGIES INC. 发明人 TSENG TIMOTHY;CHEN MURPHY
分类号 G06F12/00;G06F13/14;G11C5/00 主分类号 G06F12/00
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