发明名称 Floating-point processor with operating mode having improved accuracy and high performance
摘要 Floating-point units (FPUs) and processors having a "flush-to-nearest" operating mode that provides improved accuracy over a conventional "flush-to-zero" mode. The FPU or processor includes an operand processing section and an operand flush section. For each floating-point operation, the operand processing section receives and processes one or more input operands to provide a preliminary result. The operand flush section determines whether the preliminary result falls within one of a number of ranges of values and sets the preliminary result to one of a number of set values if the preliminary result falls within one of the ranges. In a specific implementation, a first range of values is defined to include values greater than zero and less than half of a minimum normalized number (i.e., 0<|Y|<+A<SUB>min</SUB>/2), a second range of values is defined to include values equal to or greater than +a<SUB>min</SUB>/2 and less than +a<SUB>min, (i.e., a<SUB>min</SUB>/2<=|Y|<A<SUB>min</SUB>), and the preliminary result is set to zero if it falls within the first range and to +a<SUB>min </SUB>or -a<SUB>min </SUB>(depending on the sign bit) if it falls within the second range.
申请公布号 US6996596(B1) 申请公布日期 2006.02.07
申请号 US20000577238 申请日期 2000.05.23
申请人 MIPS TECHNOLOGIES, INC. 发明人 HO YING-WAI;JIANG XING YU
分类号 G06F7/38 主分类号 G06F7/38
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