| 摘要 |
There is disclosed a semiconductor integrated circuit in which an equalize circuit is connected between input nodes N 1 , bN 1 of a differential sense amplifier. A latch circuit is connected between nodes N 2 , bN 2 . A data change circuit is connected between the nodes N 1 and bN 2 and between the nodes bN 1 and N 2 . A disconnection circuit is connected between the nodes N 1 and N 2 and between the nodes bN 1 and bN 2 . In a state in which potentials of the input nodes N 1 , bN 1 are equal to each other, the differential sense amplifier is operated, and output data of the amplifier is reversed by the data change circuit and subsequently latched by the latch circuit. The latched data is supplied to the input nodes N 1 , bN 1 of the differential sense amplifier.
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