发明名称 Method of fabricating dual damascene interconnection
摘要 In a method of fabricating a dual damascene interconnection, a reliable trench profile is secured. The method includes forming a lower interconnect feature on a substrate, forming a dielectric layer on the lower interconnect feature, forming a hard mask on the dielectric layer, forming a via in the dielectric layer using the hard mask as an etch mask, forming a trench hard mask defining a trench by patterning the hard mask, forming a trench, which is connected with the via and in which an upper interconnection line is formed, by partially etching the dielectric layer using the trench hard mask as an etch mask, removing the trench hard mask using wet etch, and forming an upper interconnection line by filling the trench and the via with an interconnection material.
申请公布号 US2006024948(A1) 申请公布日期 2006.02.02
申请号 US20050157363 申请日期 2005.06.21
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 OH HYEOK-SANG;CHUNG JU-HYUCK;KIM IL-GOO
分类号 H01L21/4763 主分类号 H01L21/4763
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